Alignment of 10 bit A/D conversions

Problem:
The paragraph above table 3.13 on page 46 is incorrect.

Solution:
Although the figures on page 46 are correct, the paragraph above figure 3.13 is not. It should read "In right justified conversion (Fig 3.13), a logic zero in bit 7 of register 0x1F of register bank 1 indicates that the least significant 8 bits will be placed into register 0x1E of register bank 0 and the most significant two bits into register 0x1E of register bank 1"

Further information:
I hope that this page helps you with your projects but if you have found any other problems or if you have any further questions please contact me though the email address of gares-AT-g4aym-DOT-org-DOT-uk.

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